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Quentin Roussel
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# Using Bitvector Program Generators For Digital Circuit Synthesis
This is a small university project for NUS CS6217 Advanced Topics in Porgramming Language class.
This tool is based on the same idea as Brahma, but applied to SystemVerilog module generation.
You can read the [report here](https://git.roussel.pro/public/CS6217-Project/src/branch/master/report.pdf)

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